Dear Airspy owners,
So, with the COVID19 confinement less wasted time in the commute, I revisited Silicon Labs' ClockBuilder software for the Si5351C, and after a few days of testing, I decided to write my own. This development will be very useful for our next radios, but it can also benefit the existing owners of the Airspy R2 units, so here we are!
Technically, this update further improves the phase noise by using the internal PLLs, counters and feedback loops of the Si5351 in a more optimized way for our use than what ClockBuilder can offer. Furthermore, the 25 MHz TCXO signal is now routed directly to the R820T/2 tuner which eliminates the noise contribution from the Si5351's PLL altogether. The clock feeding the ADC was improved by using one PLL in integer mode with a fancy cycle counting ratio. Now that the tuner is using a 25MHz clock instead of 20MHZ, the potential spurs will be more spaced. The drive level of the clocks was reduced so the spur characteristics were also improved. More details in the code.
The Airspy R2 series were already privileged for their high dynamic range and low phase noise. Now these parameters just got better with a simple firmware update.
Check the firmware download in the product page: https://airspy.com/airspy-r2
The Airspy Team